require '_h2ph_pre.ph';

unless(defined(&_LINUX_FD1772REG_H)) {
    eval 'sub _LINUX_FD1772REG_H () {1;}' unless defined(&_LINUX_FD1772REG_H);
    eval 'sub FDC1772SELREG_STP () {(0x80);}' unless defined(&FDC1772SELREG_STP);
    eval 'sub FDC1772SELREG_TRA () {(0x82);}' unless defined(&FDC1772SELREG_TRA);
    eval 'sub FDC1772SELREG_SEC () {(0x84);}' unless defined(&FDC1772SELREG_SEC);
    eval 'sub FDC1772SELREG_DTA () {(0x86);}' unless defined(&FDC1772SELREG_DTA);
    eval 'sub FDC1772REG_CMD () {0;}' unless defined(&FDC1772REG_CMD);
    eval 'sub FDC1772REG_STATUS () {0;}' unless defined(&FDC1772REG_STATUS);
    eval 'sub FDC1772REG_TRACK () {2;}' unless defined(&FDC1772REG_TRACK);
    eval 'sub FDC1772REG_SECTOR () {4;}' unless defined(&FDC1772REG_SECTOR);
    eval 'sub FDC1772REG_DATA () {6;}' unless defined(&FDC1772REG_DATA);
    eval 'sub FDC1772CMD_RESTORE () {(0x);}' unless defined(&FDC1772CMD_RESTORE);
    eval 'sub FDC1772CMD_SEEK () {(0x10);}' unless defined(&FDC1772CMD_SEEK);
    eval 'sub FDC1772CMD_STEP () {(0x20);}' unless defined(&FDC1772CMD_STEP);
    eval 'sub FDC1772CMD_STIN () {(0x40);}' unless defined(&FDC1772CMD_STIN);
    eval 'sub FDC1772CMD_STOT () {(0x60);}' unless defined(&FDC1772CMD_STOT);
    eval 'sub FDC1772CMD_RDSEC () {(0x80);}' unless defined(&FDC1772CMD_RDSEC);
    eval 'sub FDC1772CMD_WRSEC () {(0xa0);}' unless defined(&FDC1772CMD_WRSEC);
    eval 'sub FDC1772CMD_RDADR () {(0xc0);}' unless defined(&FDC1772CMD_RDADR);
    eval 'sub FDC1772CMD_RDTRA () {(0xe0);}' unless defined(&FDC1772CMD_RDTRA);
    eval 'sub FDC1772CMD_WRTRA () {(0xf0);}' unless defined(&FDC1772CMD_WRTRA);
    eval 'sub FDC1772CMD_FORCI () {(0xd0);}' unless defined(&FDC1772CMD_FORCI);
    eval 'sub FDC1772CMDADD_SR6 () {(0x);}' unless defined(&FDC1772CMDADD_SR6);
    eval 'sub FDC1772CMDADD_SR12 () {(0x1);}' unless defined(&FDC1772CMDADD_SR12);
    eval 'sub FDC1772CMDADD_SR2 () {(0x2);}' unless defined(&FDC1772CMDADD_SR2);
    eval 'sub FDC1772CMDADD_SR3 () {(0x3);}' unless defined(&FDC1772CMDADD_SR3);
    eval 'sub FDC1772CMDADD_V () {(0x4);}' unless defined(&FDC1772CMDADD_V);
    eval 'sub FDC1772CMDADD_H () {(0x8);}' unless defined(&FDC1772CMDADD_H);
    eval 'sub FDC1772CMDADD_U () {(0x10);}' unless defined(&FDC1772CMDADD_U);
    eval 'sub FDC1772CMDADD_M () {(0x10);}' unless defined(&FDC1772CMDADD_M);
    eval 'sub FDC1772CMDADD_E () {(0x4);}' unless defined(&FDC1772CMDADD_E);
    eval 'sub FDC1772CMDADD_P () {(0x2);}' unless defined(&FDC1772CMDADD_P);
    eval 'sub FDC1772CMDADD_A0 () {(0x1);}' unless defined(&FDC1772CMDADD_A0);
    eval 'sub FDC1772STAT_MOTORON () {(0x80);}' unless defined(&FDC1772STAT_MOTORON);
    eval 'sub FDC1772STAT_WPROT () {(0x40);}' unless defined(&FDC1772STAT_WPROT);
    eval 'sub FDC1772STAT_SPINUP () {(0x20);}' unless defined(&FDC1772STAT_SPINUP);
    eval 'sub FDC1772STAT_DELDAM () {(0x20);}' unless defined(&FDC1772STAT_DELDAM);
    eval 'sub FDC1772STAT_RECNF () {(0x10);}' unless defined(&FDC1772STAT_RECNF);
    eval 'sub FDC1772STAT_CRC () {(0x8);}' unless defined(&FDC1772STAT_CRC);
    eval 'sub FDC1772STAT_TR00 () {(0x4);}' unless defined(&FDC1772STAT_TR00);
    eval 'sub FDC1772STAT_LOST () {(0x4);}' unless defined(&FDC1772STAT_LOST);
    eval 'sub FDC1772STAT_IDX () {(0x2);}' unless defined(&FDC1772STAT_IDX);
    eval 'sub FDC1772STAT_DRQ () {(0x2);}' unless defined(&FDC1772STAT_DRQ);
    eval 'sub FDC1772STAT_BUSY () {(0x1);}' unless defined(&FDC1772STAT_BUSY);
    eval 'sub DSKSIDE () {(0x1);}' unless defined(&DSKSIDE);
    eval 'sub DSKDRVNONE () {(0x6);}' unless defined(&DSKDRVNONE);
    eval 'sub DSKDRV0 () {(0x2);}' unless defined(&DSKDRV0);
    eval 'sub DSKDRV1 () {(0x4);}' unless defined(&DSKDRV1);
    eval 'sub FDC1772STEP_6 () {0x;}' unless defined(&FDC1772STEP_6);
    eval 'sub FDC1772STEP_12 () {0x1;}' unless defined(&FDC1772STEP_12);
    eval 'sub FDC1772STEP_2 () {0x2;}' unless defined(&FDC1772STEP_2);
    eval 'sub FDC1772STEP_3 () {0x3;}' unless defined(&FDC1772STEP_3);
}
1;
